Industrial packaging assembly lines often require counting the quantity of packaged items, such as packing 24 bottles of beer into a box. To perform counting for a quantity like "24 bottles," counter instructions are utilized. In this article, we will discuss the counters in S7-300/400 PLCs.
Within the Siemens S7-300/400 CPU, there is a dedicated counter storage area. The size of this storage area determines the number of counters it can accommodate, and different CPU models support varying quantities of counters. For example, the CPU315-2PN/DP supports 256 counters (SIAMTIC counter), while the CPU319-3PN/DP supports 2048 counters (SIAMTIC counter). The difference can be significant, isn't it?
Despite the varying numbers of supported counters, the structure of each counter is the same. It consists of two parts: a 16-bit counter word (WORD) and binary status bits (Bit).
The 16-bit counter word stores the current counting value, represented using three BCD codes. Bit0Bit3 represent BCD0, Bit4Bit7 represent BCD1, Bit8Bit11 represent BCD2, and Bit12Bit15 are reserved (unused). The counting value ranges from 0 to 999, as illustrated in the diagram below:
The binary counter bits are used to represent the status of the counter. When the counting value is greater than 0, the status bit is set to 1. When the counting value is equal to 0, the status bit is set to 0.
To access the counters, the letter "C" is combined with the counter's number (e.g., C10). Bit manipulation instructions can be used to access the status bits of the counter, while word manipulation instructions can access the current value (counting value) of the counter.
Step7 supports two types of counters: IEC counters and SIMATIC counters. In this chapter, we discuss SIMATIC counters.
SIMATIC counters include three types: Up Counter (S_CU), Down Counter (S_CD), and Up/Down Counter (S_CUD).
The instruction for the Up Counter (S_CU) is as shown in the following diagram:
When the signal "I_input (I1.2)" transitions from 0 to 1 (rising edge), and the current counting value (MW10) is less than 999, the current value of the counter will increase by 1.
When the signal "I_Set (I1.3)" transitions from 0 to 1 (rising edge), the current value of the counter (MW10) will be replaced by the preset value (C#10).
When "I_Reset (I1.4)" is set to 1, the current value of the counter (MW10) is reset to 0.
As long as the current value of the counter (MW10) is greater than 0, the output of the counter (Q0.0) is set to 1.
The instruction for the Down Counter (S_CD) is as shown in the following diagram:
When the signal "I_input (I1.2)" transitions from 0 to 1 (rising edge), and the current counting value (MW14) is greater than 0, the current value of the counter will decrease by 1.
When the signal "I_Set (I1.3)" transitions from 0 to 1 (rising edge), the current value of the counter (MW14) will be replaced by the preset value (C#800).
When "I_Reset (I1.4)" is set to 1, the current value of the counter (MW14) is reset to 0.
As long as the current value of the counter (MW14) is greater than 0, the output of the counter (Q0.1) is set to 1.
There is another type of counter that supports both addition and subtraction operations simultaneously - the Up/Down Counter (S_CUD), as shown in the following diagram:
When the signal "I_input (I1.2)" transitions from 0 to 1 (rising edge), and the current counting value (MW18) is less than 999, the current value of the counter will increase by 1.
When the signal "I_C_down (I1.5)" transitions from 0 to 1 (rising edge), and the current counting value (MW18) is greater than 0, the current value of the counter will decrease by 1.
When the signal "I_Set (I1.3)" transitions from 0 to 1 (rising edge), the current value of the counter (MW18) will be replaced by the preset value (C#100).
When "I_Reset (I1.4)" is set to 1, the current value of the counter (MW18) is reset to 0.
As long as the current value of the counter (MW18) is greater than 0, the output of the counter (Q0.2) is set to 1.
The internal counter instructions of SIMATIC, as described above, differ from the previously introduced high-speed counters. High-speed counters are connected to external pulse inputs and often have dedicated counting chips to handle high-speed pulse counting. Some high-speed counters come with separate hardware modules (S7-1200 series integrates high-speed counters within the CPU). On the other hand, the counters introduced in this chapter are part of the CPU's internal storage area, and their signals are influenced by the scan cycle, making them unsuitable for high-speed counting.
That concludes the introduction to S7 counter instructions. For further reference, please check related articles: